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general description the max9129 is a quad bus low-voltage differential sig-naling (blvds) driver with flow-through pinout. this device is designed to drive a heavily loaded multipoint bus with controlled transition times (1ns 0% to 100% minimum) for reduced reflections. the max9129 accepts four lvttl/lvcmos input levels and trans- lates them to output levels of 250mv to 450mv (stan- dard lvds levels) into a 27 load at speeds up to 200mbps (100mhz).the power-on reset ensures that all four outputs are disabled and high impedance during power up and power down. the outputs can be set to high imped- ance by two enable inputs, en and en , thus dropping the device to a low-power state of 11mw. the enablesare common to all four drivers. the flow-through pinout simplifies pc board layout and reduces crosstalk by keeping the lvttl/lvcmos inputs and blvds outputs separated. the max9129 operates from a single +3.3v supply and is specified for operation from -40? to +85?. it is available in 16-pin qfn and tssop packages. refer to the max9121 data sheet for a quad lvds line receiver with flow-through pinout. applications cell phone base stationsadd/drop muxes digital cross-connects dslams network switches/routers backplane interconnect clock distribution features ? drive lvds levels into a 27 load ? 1ns (0% to 100%) minimum transition timereduces reflections ? guaranteed 200mbps (100mhz) data rate ? enable pins for high-impedance output ? high-impedance outputs when powered off ? glitch-free power-up and power-down ? hot swappable ? flow-through pinout ? available in tiny qfn package (50% smaller than tssop) ? single +3.3v supply max9129 quad bus lvds driver with flow-through pinout max9129 max9121 max9129 max9121 max9129 max9121 max9129 max9121 r t r t r t bus a bus b r t card 1a card 10a card 1b card 2b = termination resistor r t multipoint full-duplex transmit and receive bus typical applications circuit 19-2100; rev 0; 8/01 for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com. functional diagram appears at end of data sheet.pin configurations appear at end of data sheet. ordering information part temp. range pin-package max9129ege -40 c to +85 c 16 qfn max9129eue -40 c to +85 c 16 tssop ________________________________________________________________ maxim integrated products 1 downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout 2 _______________________________________________________________________________________ absolute maximum ratings stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. v cc to gnd ...........................................................-0.3v to +4.0v in_, en, en to gnd....................................-0.3v to (v cc + 0.3v) out_+, out_- to gnd..........................................-0.3v to +4.0v short-circuit duration (out_+, out_-) .....................continuous continuous power dissipation (t a = +70 c) 16-pin qfn (derate 18.5mw/ c above +70 c) .........1481mw 16-pin tssop (derate 9.4mw/ c above +70 c) .........755mw storage temperature range .............................-65 c to +150 c maximum junction temperature .....................................+150 c operating temperature range ...........................-40 c to +85 c esd protection human body model, out_+, out_- ...............................?kv lead temperature (soldering, 10s) .................................+300 c dc electrical characteristics(v cc = +3.0v to +3.6v, r l = 27 ?%, en = high, en = low, t a = -40 c to +85 c, unless otherwise noted. typical values are at v cc = +3.3v, t a = +25 c.) (notes 1, 2) parameter symbol conditions min typ max units blvds outputs (out_+, out_-) differential output voltage v od figure 1 250 371 450 mv change in magnitude of v od between complementary outputstates ? v od figure 1 1 25 mv offset voltage v os figure 1 1.125 1.29 1.375 v change in magnitude of v os between complementary outputstates ? v os figure 1 5 25 mv output high voltage v oh 1.465 1.6 v output low voltage v ol 0.90 1.085 v differential output short-circuitcurrent i osd v od = 0 20 ma output short-circuit current i os out_+ = 0 at in_ = v cc or out_- = 0 at in_ = 0 -20 ma output high-impedance current i oz disabled, out_+ = 0 or v cc , out_- = 0 or v cc -1 1 ? power-off output current i off v cc = 0 or open, en = en = in_ = 0, out_+ = 0 or 3.6v, out_- = 0 or 3.6v -1 1 ? output capacitance c out c ap aci tance fr om ou t_+ or o u t_- to g n d 4.3 pf inputs (in_, en, en ) high-level input voltage v ih 2.0 v cc v low-level input voltage v il gnd 0.8 v input current i in in_, en, en = 0 or v cc -15 15 ? supply current supply current i cc r l = 27 , in_ = v cc or 0 for all channels 58 70 ma disabled supply current i ccz disabled 3.2 5 ma downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout _______________________________________________________________________________________ 3 ac electrical characteristics(v cc = +3.0v to +3.6v, r l = 27 ?%, c l = 15pf, en = high, en = low, t a = -40 c to +85 c, unless otherwise noted. typical values are at v cc = +3.3v, t a = +25 c.) (notes 3, 4, 5) parameter symbol conditions min typ max units differential propagation delayhigh to low t phld figures 2 and 3 1.0 1.98 3.0 ns differential propagation delaylow to high t plhd figures 2 and 3 1.0 1.92 3.0 ns differential pulse skew (note 6) t skd1 figures 2 and 3 300 ps differential channel-to-channelskew (note 7) t skd2 figures 2 and 3 450 ps differential part-to-part skew(note 8) t skd3 figures 2 and 3 1.2 ns differential part-to-part skew(note 9) t skd4 figures 2 and 3 2.0 ns max9129ege 0.60 1.19 1.55 rise time t tlh figures 2 and 3 max9129eue 0.60 1.09 1.40 ns max9129ege 0.60 1.12 1.55 fall time t thl figures 2 and 3 max9129eue 0.60 1.02 1.40 ns disable time high to z t phz figures 4 and 5 8 ns disable time low to z t plz figures 4 and 5 8 ns enable time z to high t pzh figures 4 and 5 10 ns enable time z to low t pzl figures 4 and 5 10 ns maximum operating frequency(note 10) f max figure 2 100 mhz note 1: maximum and minimum limits over temperature are guaranteed by design and characterization. devices are 100% tested at t a = +25 c. note 2: current into the device is defined as positive, and current out of the device is defined as negative. all voltages are referenced to ground except v od and ? v od . note 3: ac parameters are guaranteed by design and characterization. note 4: c l includes probe and jig capacitance. note 5: signal generator conditions: v ol = 0, v oh = v cc , f = 100mhz, 50% duty cycle, r o = 50 , t r = t f = 1ns (10% to 90%). note 6: t skd1 is the magnitude difference of differential propagation delays. t skd1 = | t phld - t plhd | . note 7: t skd2 is the magnitude difference of t phld or t plhd of one channel to the t phld or t plhd of another channel on the same device. note 8: t skd3 is the magnitude difference of any differential propagation delays between devices at the same v cc and within 5 c of each other. note 9: t skd4 is the magnitude difference of any differential propagation delays between devices operating over the rated supply and temperature ranges. note 10: signal generator conditions: v ol = 0, v oh = v cc , f = 100mhz, 50% duty cycle, r o = 50 , t r = t f = 1ns (10% to 90%). max9129 output criteria: duty cycle = 45% to 55%, v od 250mv, all channels switching. downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout 4 _______________________________________________________________________________________ typical operating characteristics (max9129eue (tssop package), v cc = +3.3v, r l = 27 , c l = 15pf, t a = +25 c, unless otherwise noted.) (note 5) 1.481.47 1.46 1.45 1.44 3.0 3.3 3.6 output high voltage vs. supply voltage max9129 toc01 supply voltage (v) output high voltage (v) 1.121.10 1.08 1.06 1.04 3.0 3.3 3.6 output low voltage vs. supply voltage max9129 toc02 supply voltage (v) output low voltage (v) -14.08 -14.09 -14.10 -14.11 -14.12 3.0 3.3 3.6 output short current (i os ) vs. supply voltage max9129 toc03 supply voltage (v) output short current (ma) 420 422 426424 428 430 3.0 3.3 3.6 output high-impedance current vs. supply voltage max9129 toc04 supply voltage (v) output high-impedance current (pa) v out_ = v cc or 0 372.0371.5 371.0 370.5 370.0 3.0 3.3 3.6 differential output voltage vs. supply voltage max9129 toc05 supply voltage (v) differential output voltage (mv) 0 0.5000.250 1.0000.750 1.5001.250 1.750 10 50 70 30 90 110 130 150 differential output voltage vs. load resistance max9129 toc06 load resistance ( ) differential output voltage (v) 1.265 1.270 1.275 1.280 1.285 1.290 1.295 1.300 1.305 3.0 3.3 3.6 output offset voltage vs. supply voltage max9129 toc07 supply voltage (v) output offset voltage (v) 55 57 6159 63 65 01 0 1 1000 supply current vs. frequency max9129 toc08 frequency (mhz) supply current (ma) 100 56.7 56.9 57.357.1 57.5 57.7 3.0 3.3 3.6 supply current vs. supply voltage max9129 toc09 supply voltage (v) supply current (ma) downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout _______________________________________________________________________________________ 5 55 56 5857 59 60 -40 10 -15 35 60 85 supply current vs. temperature max9129 toc10 temperature ( c) supply current (ma) 1.80 1.901.85 2.001.95 2.05 2.10 3.0 3.3 3.6 differential propagaion delay vs. supply voltage max9129 toc11 supply voltage (v) differential propagation delay (ns) t phld t plhd 1.60 1.801.70 2.001.90 2.10 2.20 -40 10 -15 35 60 85 differential propagation delay vs. temperature max9129 toc12 temperature ( c) differential propagation delay (ns) t phld t plhd 0 2010 4030 6050 70 3.0 3.3 3.6 differential skew vs. supply voltage max9129 toc13 supply voltage (v) differential skew (ps) 0 20 40 60 80 100 -40 10 -15 35 60 85 differential skew vs. temperature max9129 toc14 temperature ( c) differential skew (ps) 0.8 0.9 1.11.0 1.2 1.3 3.0 3.3 3.6 transition time vs. supply voltage max9129 toc15 supply voltage (v) transition time (ns) t tlh t thl 20% to 80% typical operating characteristics (continued) (max9129eue (tssop package), v cc = +3.3v, r l = 27 , c l = 15pf, t a = +25 c, unless otherwise noted.) (note 5) 0.800 0.9000.850 1.0501.000 0.950 1.2001.150 1.100 1.250 -40 10 -15 35 60 85 transition time vs. temperature max9129 toc16 temperature ( c) transition time (ns) t tlh t thl 20% to 80% downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout 6 _______________________________________________________________________________________ pin qfn tssop name function 15 1 en lvttl/lvcmos enable input. the driver is disabled when en is low. en is internallypulled down. when en = high and en = low or open, the outputs are active. for other combinations of en and en , the outputs are disabled and are high impedance. 1, 4, 5, 16 2, 3, 6, 7 in_ lvttl/lvcmos driver inputs 24v cc power-supply input. bypass v cc to gnd with 0.1? and 0.001? ceramic capacitors. 3 5 gnd ground 68 en lvttl/lvcmos enable input. the driver is disabled when en is high. en is internally pulled down. 7, 10, 11, 14 9, 12, 13, 16 out_- inverting blvds driver outputs 8, 9, 12, 13 10, 11, 14, 15 out_+ noninverting blvds driver outputs pin description figure 3. driver propagation delay and transition time waveforms 0 v oh v ol in_ out_ - out_+ v od v cc t phld 50% 0 t thl 20% 0 80% 80% 0 t tlh 20% 0 differential t plhd 50% v od = (v out_ +) - (v out_ -) figure 1. driver v od and v os test circuit v os v cc gnd in_ r l /2 r l /2 v os v od out_- out_+ figure 2. driver propagation delay and transition time testcircuit r l c l out_ + out_ - c l 50 in_ generator downloaded from: http:///
detailed description the max9129 is a 200mbps quad differential blvdsdriver designed for multipoint, heavily loaded backplane applications. this device accepts lvttl/lvcmos input levels and translates them to output levels of 250mv to 450mv into a 27 load. the flow-through pinout simpli- fies board layout and reduces the potential for crosstalkbetween single-ended inputs and differential outputs. transition times are designed to reduce reflections, yet enable high data rates. the max9129 can be used in conjunction with standard quad lvds receivers, such as the max9121, to implement full-duplex multipointbuses more efficiently than with transceivers. effect of capacitive loading the characteristic impedance of a differential pc boardtrace is uniformly reduced when equal capacitive loads are attached at equal intervals (provided the transition time of the signal being driven on the trace is longer than the delay between loads). this kind of loading is typical of multipoint buses where cards are attached at 1in or 0.8in intervals along the length of a backplane. max9129 quad bus lvds driver with flow-through pinout _______________________________________________________________________________________ 7 table 1. input/output function table enables inputs outputs en en in_ out_+ out_ - llh h l or open hhl all other combinations of en and en xzz figure 4. driver high-impedance delay test circuit en gnd en in_ out_- out_+ 1/4 max9129 generator +1.2v 50 c l r l /2 r l /2 v cc c l figure 5. driver high-impedance delay waveform 50% en when en = 0 or open en when en = v cc out_+ when in_ = 0 out_- when in_ = v cc out_+ when in_ = v cc out_- when in_ = 0 50% 50% t plz t phz t pzl t pzh 50% v cc 0v cc 1.2vv ol v oh 1.2v 0 50% 50% 50% 50% downloaded from: http:///
max9129 the reduction in characteristic impedance is approxi-mated by the following formula: z diff-loaded = z diff-unloaded ? sqrt [c o / (c o + n ? c l / l)] where:z diff-unloaded = unloaded differential characteristic im- pedancec o = unloaded trace capacitance (pf/unit length) c l = value of each capacitive load (pf) n = number of capacitive loadsl = trace length for example, if c o = 2.5pf/in, c l = 10pf, n = 18, l = 18in, and z diff-unloaded = 120 , the loaded differential impedance is: z diff-loaded = 120 ? sqrt [2.5pf / (2.5pf + 18 ? 10pf/18in)] z diff-loaded = 54 in this example, capacitive loading reduces the charac-teristic impedance from 120 to 54 . the load seen by a driver located on a card in the middle of the bus is27 because the driver sees two 54 loads in parallel. a typical lvds driver (rated for a 100 load) would not develop a large enough differential signal to be reliablydetected by an lvds receiver. maxim s blvds driver is designed and specified to drive a 27 load to differen- tial voltage levels of 250mv to 450mv (which are stan-dard lvds driver levels). a standard lvds receiver is able to detect this level of differential signal. short extensions off the bus, called stubs, contribute to capacitive loading. keep stubs less than 1in for a good balance between ease of component placement and good signal integrity. the max9129 is a current source driver and drives larger differential signal levels into loads higher than 27 and smaller levels into loads less than 27 (see typical operating curves). to keep loading from reduc-ing bus impedance below the rated 27 load, pc board traces can be designed for higher unloadedcharacteristic impedance. effect of transition time for transition times (measured from 0% to 100%) short-er than the delay between capacitive loads, the loads are seen as low-impedance discontinuities from which the driven signal is reflected. reflections add and sub- tract from the signal being driven and cause decreased noise margin and jitter. the max9129 is designed for a minimum transition time of 1ns (rated 0.6ns from 20% to80%, or about 1ns 0% to 100%) to reduce reflections while being fast enough for high-speed backplane data transmission. power-on reset the power-on reset voltage of the max9129 is typically2.25v. when the supply falls below this voltage, the device is disabled and the outputs are in high imped- ance. applications information power-supply bypassing bypass v cc with high-frequency, surface-mount ceramic 0.1? and 0.001? capacitors in parallel asclose to the device as possible, with the smaller valued capacitor closest to v cc . termination in the example above, the loaded differential imped-ance of the bus is reduced to 54 . since it can be dri- ven from any card position, the bus must be terminatedat each end. a parallel termination of 54 at each end of the bus placed across the traces that make up thedifferential pair provides a proper termination. the total load seen by the driver is 27 . the max9129 drives higher differential signal levelsinto lighter loads. a multidrop bus with the driver at one end and receivers connected at regular intervals along the bus has a lowered impedance due to capacitive loading. assuming the same impedance calculated in the multidrop example above (54 ), the multidrop bus can be terminated with a single, parallel-connected54 resistor at the far end from the driver. only a single resistor is required because the driver sees one 54 differential trace. the signal swing is larger with a 54 load.in general, parallel terminate each end of the bus with a resistor matching the differential impedance of the bus (taking into account any reduced impedance due to loading). board layout a four-layer pc board that provides separate power,ground, input, and output signals is recommended. keep the lvttl/lvcmos and blvds signals separat- ed to prevent coupling as shown in the suggested lay- out for the qfn package (not drawn to scale) (figure 6). quad bus lvds driver with flow-through pinout 8 _______________________________________________________________________________________ downloaded from: http:///
chip information transistor count: 948process: cmos max9129 quad bus lvds driver with flow-through pinout _______________________________________________________________________________________ 9 figure 6. suggested layout for qfn package en in1 in2 in3 in4 gnd v cc en out1-out1+ out2+ out3+ out4+ out4- out2-out3- gnd downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout 10 ______________________________________________________________________________________ 1615 14 13 1615 14 13 1211 10 9 1211 10 9 12 34 5 6 7 8 5 6 7 8 en out1- out1+ out1- out1+ out2+out2- out3- out3+ out2+out2- out3- out3+ out4+out4- out4+ out4- top view max9129 max9129 tssop qfn (4mm x 4mm) (contacts under qfn) in1in2 in3 v cc gnd in4 en en in1 in2in3 v cc gnd in4 en 12 34 gnd gnd gnd gnd gnd pin configurations out1+out1- out2+ out2- out3+ out3- out4+ out4- enen in1in2 in3 in4 max9129 functional diagram downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout ______________________________________________________________________________________ 11 package information tssop,no pads.eps downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout 12 ______________________________________________________________________________________ package information (continued) 12, 16,20, 24l qfn.eps downloaded from: http:///
max9129 quad bus lvds driver with flow-through pinout maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circuit patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 ____________________ 13 2001 maxim integrated products printed usa is a registered trademark of maxim integrated products. package information (continued) downloaded from: http:///

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